Difference Between PLA and PAL

PLA and PAL are types of Programmable Logic Devices (PLD) which are used to design combination logic together with sequential logic. The significant difference between the PLA and PAL is that the PLA consists of the programmable array of AND and OR gates while PAL has the programmable array of AND but a fixed array of OR gate. PLD’s provides a more simple and flexible way of designing the logic circuits where the number of functions can also be increased. These are also implemented in IC.

Before PLD’s, multiplexers were used for designing a combinational logic circuit, these circuits were highly complex and rigid. Then Programmable logic devices (PLD) are developed, and the first PLD was ROM. ROM design was not very successful as it emerged the issue of hardware wastage and increasing exponential growth in the hardware for every large application. To overcome the limitations of ROM, PLA and PAL were devised. PLA and PAL are programmable and effectively utilizes the hardware.

Content: PLA Vs PAL

1. 1. Comparison Chart
   2. Definition
   3. Key Differences
   4. Conclusion

Comparison Chart

Basis for comparison	PLA	PAL
Stands for	Programmable Logic Array	Programmable Array Logic
Construction	Programmable array of AND and OR gates.	Programmable array of AND gates and fixed array of OR gates.
Availability	Less prolific	More readily available
Flexibility	Provides more programming flexibility.	Offers less flexibility, but more likely used.
Cost	Expensive	Intermediate cost
Number of functions	Large number of functions can be implemented.	Provides the limited number of functions.
Speed	Slow	High

Definition of PLA

PLA stands for the Programmable Logic Array which presents the boolean function in the SOP (Sum of Products) form. The PLA contains NOT, AND and OR gates fabricated on the chip. It passes every input by a NOT gate which makes each input and its complement available to every AND gate. The output of each AND gate is given to the each OR gate. At last, the OR gate output produces chip output. So, this is how suitable connections are made to employ SOP expressions.

In PLA the connections to both AND and OR arrays are programmable. PLA is considered more expensive and complex as compared to the PAL. The two different manufacturing techniques can be used for PLA to increase the ease of programming. In this technique, each connection is built through a fuse at every intersection point where the unwanted connections can be removed by blowing the fuses. The latter technique involves the connection making at the time of the fabrication process with the help of the proper mask provided for the specific interconnection pattern.

Definition of PAL

PAL (Programmable Array Logic) is also a PLD (Programmable Logic Device) circuit which works similar to the PLA. PAL employs the programmable AND gates but fixed OR gates, unlike PLA. It implements two simple functions where the number of linked AND gates to each OR gate specifies the maximum number of product terms that can be generated in a sum-of-products representation of the particular function. While the AND gates are perpetually connected to the OR gates, which signifies that the produced product term is not shareable with the output functions.

The main concept behind developing PLD’s is to embed a complex boolean logic into a single chip. Therefore, eliminating the unreliable wiring, preventing the logic design and minimizing power consumption.

Conclusion

Programmable Logic Array (PLA) and Programmable Array Logic (PAL) are the PLD (Programmable Logic Devices) where PLA is more adaptable and flexible than PAL. However, PAL can easily produce a combination logic circuit.